Different proposals to the multiplication of 3/spl times/3 vision mask in VHDL for FPGA's

2003

Abstract

This work shows different proposals to implement generic convolution with images from a vision camera. The developed algorithms present different methods to perform convolutions using VHDL language. The main problem of this operation is the high number of mathematical operations; numerous multiplications, additions and divisions are needed. This cause has led to create design electronic circuits, whose structure is based on internal FPGA resources (field programmable gate array). So the obtained result has been optimised in terms of speed and required resources in circuits. These kinds of generic operations are often used in artificial vision, as a pre-processing stage for images. This step precedes image processing.

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